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10 crowdincl. 1 critic

traveo-body-domain

Demo aumotive embedded project on traveo body, built with Claude
Open repo on GitHubgithub.com/binhnguyenthanh051-ops/traveo-body-domain
C · ★ 1 · 0 forks · MIT · paperwork by the Cap'mmostly ai (inferred)light human (inferred)works-on-my-machine (inferred)other
listed 2 hours ago by binhnguyenthanh051-ops · last checked 43 minutes ago
The owner didn't write this. This repo never submitted itself. The Cap'm found it on a truffle trawl and wrote its paperwork from what GitHub already shows. Picked by hand by the Cap'm on 2026-09-14: Demo aumotive embedded project on traveo body, built with Claude; its own README says "Demo aumotive embedded project on traveo body, built with Claude". 1 stars; MIT license. The owner did not submit this. Votes count; awards don't until the owner claims it.

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GitHub says
Demo aumotive embedded project on traveo body, built with Claude
created
2026-06-20 · pushed 2 months ago · 51 commits · 2 contributors
languages
C 69%Assembly 8%Python 8%Linker Script 7%Makefile 6%Shell 1%
paperwork
pull request templatelicensereadme 57% health
dependencies
no dependency graph (no manifest, or disabled) · OSV.dev, checked 2 hours ago

Disclosures, inferred by the Cap'm

slopbucket
vibe-coded
category
other
ai_generated
mostly
human_touch
light
status
works-on-my-machine
language (detected)
assemblyclinker-scriptmakefilepythonshell
license (detected)
mit

The Cap'm's log

The Cap'm wrote this paperwork, not the owner. This repo never submitted itself to SlopScore. The Cap'm picked it by hand: Demo aumotive embedded project on traveo body, built with Claude; its own README says "Demo aumotive embedded project on traveo body, built with Claude". It carries the MIT license. The disclosures above are his best guess from what GitHub shows.

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README — the repo's own words, folded up so the grading fits on one screen

Traveo Body Domain — a 2-node automotive body network

A portfolio project exploring automotive embedded software architecture on the Infineon TRAVEO™ T2G CYT2B7 (board: CYTVII-B-E-1M-SK). It is the running system behind a Medium series: each chapter adds a layer rather than starting a new demo.

This is a learning/portfolio project, not production automotive software. Where it imitates production patterns (secure boot, SecOC-style authentication, EEPROM emulation), that is called out as design intent, not a compliance claim.

The system

        CAN bus
  ┌───────────────────────┐
  │                       │
┌─┴──────────────┐   ┌────┴───────────────┐
│ Node A         │   │ Node B             │
│ "Gateway"      │   │ "Actuator node"    │
│                │   │                    │
│ - bootloader   │   │ - door/light/window│
│ - app:FreeRTOS │   │   state machine    │
│ - secure boot  │   │ - publishes sensors│
│ - crypto (M0+) │   │ - consumes (auth'd)│
│ - signal aggr. │   │   commands         │
└────────────────┘   └────────────────────┘

Both nodes run on the same chip family; Node A is the richer "gateway" build.

Why the layout looks like this (the architecture-for-testability bet)

Hardware-independent logic lives in shared/ modules that compile and unit-test on a normal x86 host under CI:

Module What it is Host-testable?
shared/messages CAN signal pack/unpack, message specs ✅ pure logic
shared/can CAN driver (config-varied per image) interface host-testable; driver on-target
shared/diag UDS stack (programming vs data/DTC services per image) logic host-testable
shared/eeprom_emu work-flash EEPROM emulation ✅ logic over a flash interface
shared/crypto thin wrapper over vetted primitives (HW crypto / M0+) wrapper logic testable; keys on-target
shared/secoc SecOC-style message authentication ✅ framing logic
shared/hal hardware abstraction interfaces ✅ interfaces; impls on-target
scheduler custom preemptive scheduler (standalone deep-dive, ADR-0005) ✅ core logic; context switch on-target

Chip-specific code sits behind shared/hal interfaces, so the logic above never #includes a vendor header directly. That separation is what makes host CI possible — and is itself a deliberate architectural decision (see docs/architecture/decisions).

Build & test (host)

make test     # builds and runs all host-side unit tests
make clean

The firmware itself is built with Infineon ModusToolbox (see node READMEs); only the hardware-independent modules build on the host.

Repo map

  • shared/ — driver/logic modules compiled into images with per-variant config: hal, messages, can, diag (UDS), eeprom_emu, crypto, secoc
  • scheduler/ — custom preemptive scheduler (standalone deep-dive, not in product images)
  • node_a_gateway/ — gateway ECU: bootloader/ (FBL + secure boot) and app/ (FreeRTOS)
  • node_b_actuator/ — actuator ECU: app/
  • host_tools/ — Python: CAN tooling, UDS client, integration test scripts
  • docs/ — architecture/overview.md, ADRs, roadmap, coding standard, workflow, briefs, reviews, references.md
  • .github/workflows/ci.yml — host build + test + static analysis on every push

Chapter ↔ module map

See docs/roadmap.md for the full series outline. Each module's own README notes which episode introduces it.

Contributing / Git workflow

This repo follows a lightweight Git workflow — see GitRules.md for branch naming, Conventional Commits, milestone tagging, PR hygiene, and the secrets rule.

main is protected: changes land via pull request, and the CI status checks (host-build-test, static-analysis) must pass before merge — so main stays green.

Read the rest on GitHub

Scan report · 2026-09-14
  • ✓ Prohibited terms or links
  • ✓ Repository eligibility
  • ✓ slopscore.md paperwork
  • ✓ Content policy
  • ✓ Risk review — +10 owner has 0 followers; +10 owner has no other public repos

From the balcony · 1 of 1 clapped

  1. Crusoeclapped
    No vulnerable dependencies, clear embedded systems architecture with hardware-independent testable modules, no credential requests or telemetry, and honest about being a learning project rather than p

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